The invention relates to communications systems and methods, and, more particularly, to digital communications systems and associated methods over parallel communications channels.
Digital communications are widely used for the transmission of voice, data and video information. Such transmission can extend over large geographical distances, between components within a personal computer, or only between adjacent circuit portions on an integrated circuit. Certain such communications applications benefit from or require the conversion of serial data into parallel data for simultaneous transmission over parallel communications channels, or more generically, from Mxe2x80x2ary symbols to Nxe2x80x2ary symbols. At the receiving end, the parallel data is desirably converted back into the serial data, and with the bits or symbols in the correct order to avoid data errors.
Unfortunately, the demand for greater data transmission volumes and at ever higher speeds, may result in skew at the receiver. In other words, the parallel communications channels may introduce different delays to the parallel symbol strings they carry. Because of skew, the parallel symbol strings at the receiver can then no longer be simply reassembled into the starting data.
The skew problem with parallel communications channels has been addressed in a number of ways. For example, U.S. Pat. No. 4,677,618 to Haas et al. recognized the dispersion introduced by wavelength division multiplexed communications channels over optical fiber. This patent discloses determining the relative delays between the channels based upon detecting two bits in a given byte of data. The relative times of arrival of the remaining bits in a byte are predetermined using the relative delay between the two detected bits and the known frequency-related dispersion characteristics of the transmission medium. Certain bits in each received byte may then be delayed using clock delay lines or registers, thereby accounting for skew.
Along similar lines, U.S. Pat. No. 5,157,530 to Loeb et al. also determines and accounts for skew imparted by dispersion in fiber optic wavelength division multiplexing. Relative delays are used to control adjustable delay devices in each channel.
U.S. Pat. No. 5,408,473 to Hutchinson et al. is directed to,a technique for synchronizing run-length-limited data transmitted over parallel communications channels. Block boundary synchronization is established during connection initialization by using a property of a required HALT code to detect block boundaries received in each channel. Skew compensation is effected by comparing the times of detection of the block boundaries in the two channels, and appropriately controlling a variable delay in at least one of the channels. If there is a subsequent loss of synchronization, detected transmission errors will eventually result in connection reinitialization and reestablishment of synchronization. Unfortunately, the transmission of the fixed HALT code to detect boundaries may result in false boundary detection. Moreover, since synchronization is not continuously maintained, the technique may be impractical for higher data rates.
U.S. Pat. No. 5,793,770 to St. John et al. is directed to a high-performance parallel interface (HIPPI) to a synchronous optical network (SONET) gateway, and wherein electronic logic circuitry formats data and overhead signals into a data frame for transmission over a fiber optic channel. Stripe skew adjustment is based upon SONET framing, and, as such, the circuitry is relatively complicated, comprising as many as 20,000 logic gates, for example.
The difficulty with skew caused by parallel communications channels is also an important issue to be addressed in communications channels between integrated circuit devices. For example, higher transmission speeds increase the sensitivity to skew, as there is a smaller time window to correctly identify a received bit and have it properly align with bits received on the other parallel communications channels. To provide a higher aggregate transmission rate, the number of parallel communications channels can be increased, without increasing the speed of any given communications channel. However, this may result in significant costs for the additional communications channels. Moreover, for communications between integrated circuits, increasing the number of communications channels increases the number of pins needed for connecting the IC. The number of pins and additional packaging complexity may significantly increase the costs of such approaches.
For communications channels between physical layer devices (PLDs) or PHY devices, and logical link devices (LLDs), typical interfaces are asymmetrical and the devices are operated in a push-pull configuration. Because of the asymmetry, relatively expensive memory is required on the PLD since it is polled by the LLD, such as an asynchronous transfer mode (ATM) device. Further developments and improvements in the communications interface between a PLD and LLD are also hampered by the skew difficulty described above as a result of higher bit rates over limited parallel communications channels.
In view of the foregoing background, it is therefore an object of the present invention to provide a communications system and associated methods for operating over parallel communications channels at relatively high rates and while accounting for skew.
These and other objects, features and advantages in accordance with the present invention are provided by a communications system including first and second devices connected by parallel communications channels, wherein skew over the communications channels is addressed by a straightforward technique. The first device may comprise a string-based framing coder for determining and appending a string-based framing code to each information symbol string of information symbol strings to be transmitted in parallel over respective parallel communications channels. Each string-based framing code is preferably based upon at least some of the information symbols in the respective information symbol string.
In addition, the second device preferably includes a deskewer for aligning received parallel information symbol strings based upon the string-based framing codes. By virtue of the string-based framing codes and their use to deskew received information symbol strings, the information symbols may be transmitted at high rates and/or over relatively long distances.
The information symbols may be binary bits, for example, in some embodiments of the invention. The string-based coder may comprise a cyclic redundancy checking (CRC) coder for determining and appending CRC codes to respective information bit strings. Thus, the deskewer may comprise a CRC framer for framing the information bit strings based upon the CRC codes. Of course, the second device may also include an error detection and correction circuit using the CRC codes. Each CRC code may be one of a CRC-4 to CRC-32 code, for example.
The deskewer may comprise a framer for framing information symbol strings based upon the respective string-based framing codes, and an aligner for aligning framed information symbol strings relative to one another and based upon the string-based framing codes. The aligner may, in turn, comprise at least one first-in-first-out (FIFO) device connected to the framer for buffering framed information bit strings, and a FIFO controller for aligning framed information bit strings during at least one of a writing and a reading phase of the at least one FIFO device and based upon the string-based framing codes. All of the information symbol strings may have a same number of symbols in some embodiments.
A clock signal may be sent over a communications channel from the first to the second device. In addition, the first device may comprise a scrambler for scrambling the information symbol strings, such as to facilitate clock recovery at the second device in another embodiment. Accordingly, the deskewer may also comprise a descrambler for descrambling received information symbol strings. The scrambler may be located upstream from the string-based framing coder to scramble the information symbol strings prior to determining and appending the string-based framing codes. Alternately, the scrambler may be downstream from the string-based framing coder.
The first device may further comprise an Mxe2x80x2ary-to-Nxe2x80x2ary symbol converter for converting or mapping M symbols into N information symbol strings for transmission on the parallel communications channels. The deskewing circuit provides the reverse Nxe2x80x2ary-to-Mxe2x80x2ary conversion at the second device and with the skew removed. The parallel communications channels may be provided over at least one wireline transmission medium, at least one wireless transmission medium, or at least one optical transmission medium.
Another aspect of the invention relates to a method for communicating between first and second devices while providing efficient deskewing. More particularly, the method preferably comprises the steps of determining and appending a string-based framing code to each information symbol string of information symbol strings at the first device for being transmitted in parallel over respective parallel communications channels, and with each string-based framing code being based upon at least some of the information symbols in the respective information symbol string. The method also includes the step of eskewing received information symbol strings at the econd device by aligning received information symbol trings based upon the string-based framing codes.
The symbols may be binary bits, for example. he step of determining and appending the string-based odes may comprise determining and appending cyclic redundancy checking (CRC) codes. The step of deskewing may further comprise the step of framing the information bit strings based upon the CRC codes. In addition, the method may also include the step of performing error detection and correction at the second device using the CRC codes. Each CRC code may be one of a CRC-4 to CRC-32 code.
The step of deskewing preferably comprises: determining framing of the information symbol strings based upon the respective string-based framing codes; and aligning information symbol strings received from parallel communications channels relative to one another and based upon the string-based framing codes. The step of aligning, in turn, may comprise the steps of: providing at least one first-in-first-out (FIFO) device buffering framed information bit strings; and aligning information bit strings during at least one of a writing and a reading phase of the at least one FIFO device and based upon the string-based framing codes.